Next Talk: 2/August/2021, 4-5:30pm CET

Link: To be posted
4pm Central European time is (usually) 7am Pacific time and 10pm Beijing time

Mythic's Flash-based Analog Compute-in-Memory

Dr. Dave Fick, CTO of Mythic

Abstract

AI and many other applications have opportunities to build systems that merge memory and computing into a unified structure in ways that yields significant improvements in energy efficiency, performance, and cost. In these scenarios, "moving the compute to the memory" makes sense because the applications have large amounts of data to process and relatively simple operations to perform, which makes it not too difficult to create specialized processing near the memory when traditionally moving the data to the main system processor would be slow and inefficient. These approaches have a wide variety of applications as well as approaches. On one end of the spectrum, systems that have processing inside of an SSD to perform searches inside the drive itself, and on the other end of the spectrum, systems that have analog compute performing mathematics directly on the bitlines of the memory arrays. In this talk, we will provide an overview of many of these approaches as well as the methods to their madness.

Biography

Dave Fick co-founded Mythic with Mike Henry in 2012, a company building next-generation intelligence processing units (IPUs) for edge and cloud inference. Mythic has raised $165M of venture capital to combine analog computing, dataflow architecture, and compute-in-memory to provide the best combination of performance and energy efficiency available. Dave received his Ph.D. from the University of Michigan under David Blaauw and Dennis Sylvester at the Michigan Integrated Circuits Lab.
For more information, please see his webpages at http://davefick.com or https://www.mythic-ai.com/

more info

Dr. Nima TaheriNejad

has PhD in Electrical and Computer Engineering from University of British Columbia (UBC), Vancouver, Canada. He is currently an assistant professor in TU Wien (formerly known also as Technical University of Vienna). Nima has published two books and more than 60 peer-reviewed articles, and has served as a reviewer and an editor of various journals and conferences. He has also been an organizer and a chair of various conferences and workshops.
Nima has received several awards and scholarships from universities, conferences, and competitions he has attended. For more detailed information please visit his website.
Nima's interest in in-memory computing has peaked during last years. His work in this field is focused on design and implementation of memristive in-memory computing circuits and systems. Below you find a list of his and his team's publications related to in-memory computing.

Related publications since 2015

Used Tags: [J] Peer-reviewed Journal Papers, [C] Peer-reviewed Conference Papers, [B] Books, [P] Patents, [M] Other Publications.

Type 🡙	Writers 🡙	Title 🡙	Year 🡙
[M3]	D. Radakovits and N. Taherinejad	“BEhavioral Leakage and IntEr-cycle Variability Emulator model for ReRAMs (BELIEVER)” , arXiv:2103.04179, pp. 1-13,	2021
[J5]	N. Taherinejad	“SIXOR: Single-cycle In-memristor XOR”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), pp. 1-11,	2021
[M2]	S. M. Laube and N. Taherinejad	“Device Variability Analysis for Memristive Material Implication”, arXiv:2101.07231, pp. 1-12,	2021
[J4]	M. R. Alam, M. H. Najafi and N. Taherinejad	“Exact Stochastic Computing Multiplication in Memristive Memory”, IEEE Design and Test, pp. 1-8,	2021
[M1]	M. R. Alam, M. H. Najafi and N. Taherinejad	“Sorting in Memristive Memory” , arXiv:2012.09918, pp. 1-10,	2020
[J3]	D. Radakovits, N. Taherinejad, M. Cai, T. Delaroche, and S. Mirabbasi	“A Memristive Multiplier using Semi-Serial IMPLY-based Adder” , IEEE Transactions on Circuits and Systems I: Regular Papers, pp. 1495-1506,	2020
[C6]	M. R. Alam, M. H. Najafi and N. Taherinejad	“Exact In-Memory Multiplication Based on Deterministic Stochastic Computing” ,2020 IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1-5,	2020
[J2]	S. G. Rohani N. Taherinejad, D. Radakovits	“A Semi-Parallel Full-Adder in IMPLY Logic” , IEEE Transactions on Very Large Scale Integration Systems (TVLSI), vol. 28, no.1, pp. 297-301,	2020
[J1]	N. Taherinejad and D. Radakovits	“From behavioral design of memristive circuits and systems to physical implementations”, IEEE Circuit and Systems (CAS) Magazine, vol. 19(4), pp. 6-18,	2019
[C5]	N. Taherinejad, T. Delaroche, D. Radakovits, and S. Mirabbasi	“A semi-serial topology for compact and fast IMPLY-based memristive full adders”, IEEE New Circuits and Systems symposium (NewCAS), pp. 1-4,	2019
[C4]	D. Radakovits and N. Taherinejad	“Implementation and characterization of a memristive memory system”, In 2019 IEEE 32nd Canadian Conference on Electrical and Computer Engineering (CCECE), pp. 1-5,	2019
[C3]	S. Rohani G., N. Taherinejad	“An Improved Algorithm for IMPLY Logic Based Memristive Full-Adder”, 2017 IEEE 30th Canadian Conference on Electrical and Computer Engineering (CCECE), pp. 1-4,	2017
[C2]	N. Taherinejad, S. Manoj P. D., M. Rathmair, A. Jantsch	“Fully digital write-in scheme for multi-bit memristive storage”, 13th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE), Mexico City, Mexico, pp. 1-6,	2016
[C1]	N. Taherinejad, S. Manoj P. D., A. Jantsch	“Memristors' Potential for Multi-Bit Storage and Pattern Learning”, IEEE Proceedings of the 9th European Modelling Symposium (EMS 2015), pp. 450-455,	2015